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order this document by eb381/d semiconductor products sector engineering bulletin motorola, inc., 2001 eb381 migrating from the mc68hc811e2 to the mc68hc11f1 by timothy j. airaudi applications engineering motorola embedded control division austin, texas introduction this engineering bulletin explains how existing users of the mc68hc811e2 could migrate to the mc68hc11f1. the last date that the mc68hc811e2 can be ordered from motorola is june 30, 2001. however, beyond that date, parts may be available from motorola distributors. the mc68hc811e2 is a versatile part used in many different types of applications. this document addresses applications that use the part in expanded mode only. customers using single-chip mode should see migrating from the mc68hc811e2 to the mc68hc711e9 , motorola document order number eb380/d. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
engineering bulletin eb381 2 motorola migrating to the mc68hc11f1 for current mc68hc811e2 users with external memory systems (expanded mode operation), the mc68hc11f1 is a possible replacement part (see table 1 ). the mc68hc11f1 can address 64 kbytes of external memory in expanded mode and requires less glue logic than the mc68hc811e2. other advantages of migrating to the mc68hc11f1 are: more ram more expanded mode input/output (i/o) non-multiplexed address/data bus 3-volt operation ability to run at higher speeds for complete information on the mc68hc811e2, see the m68hc11e family technical data , motorola document order number m68hc11e/d. for information on the mc68hc11f1, see the mc68hc11f1 technical data , motorola document order number mc68h11cf1/d. both can be found at http://motorola.com/semiconductor (the motorola world wide web site). major differences the major differences between these two parts are: package options memory map (memory, registers, etc.) eeprom block protect config register external glue logic requirements f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
engineering bulletin migrating to the mc68hc11f1 eb381 motorola 3 difference: package options the mc68hc811e2 is available in 52-pin plcc (plastic leaded chip carrier) and 48-pin dip (dual in-line pack) packages. the mc68hc11f1 is available in 68-pin plcc and 80-pin lqfp (low-profile quad flat pack) packages. case 1 example: 52-pin plcc issue: only 68-pin plcc or 80-pin lqfp available change required: re-layout application to allow use of the 68-pin plcc or the 80-pin lqfp. see figure 1 and figure 2 . table 1. comparison chart device mc68hc811e2 mc68hc811f1 ram (bytes) 256 1 k ee (bytes) 2048 512 timer 16-bit, 3-4 ic, 4-5 oc, rti, pulse accumulator 16-bit, 3-4 ic, 4-5 oc, rti, pulse accumulator input/output (i/o) expanded 22 30 serial sci spi sci spi analog-to-digital (a/d) 8-ch, 8-bit 8-ch, 8-bit operating voltage (v) 5.0 3.0 5.0 maximum bus frequency (mhz) 2 3 5 temperature c, v, m c, v, m package options 52 plcc (fn); 48 dip (p) 68 plcc (fn); 80 lqfp (fu) comments secure device available, mc68sec811e2; eeprom block protect 64-k external address bus, 4-program chip select, non-mux address/data bus, 3-v, 3-mhz version (mc68l11f1) document order number mc68hc11e/d mc68hc811f1/d f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
engineering bulletin eb381 4 motorola case 2 example: 48-pin dip issue: only 68-pin plcc or 80-pin lqfp available change required: re-layout application to allow use of the 68-pin plcc or the 80-pin lqfp. see figure 1 and figure 2 . figure 1. pin assignments for mc68hc11f1 68-pin plcc pe4/an4 60 pe0/an0 59 pf0/addr0 58 pf1/addr1 57 pf2/addr2 56 pf3/addr3 55 pf4/addr4 54 pf5/addr5 53 pf6/addr6 52 pf7/addr7 51 pb0/addr8 50 pb1/addr9 49 pb2/addr10 48 pb3/addr11 47 pb4/addr12 46 pb5/addr13 45 pb6/addr14 44 pc0/data0 9 4xout 8 xtal 7 extal 6 r/ w 5 e 4 moda/ lir 3 modb/v stby 2 v ss 1 v rh 68 v rl 67 pe7/an7 66 pe3/an3 65 pe6/an6 64 pe2/an2 63 pe5/an5 62 pe1/an1 61 pc1/data1 pc2/data2 pc3/data3 pc4/data4 pc5/data5 pc6/data6 pc7/data7 reset irq pg7/ csprog pg6/csgen pg5/csio1 pg4/csio2 pg3 pg2 pg1 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 pgo pd0/rxd pd1/txd pd2/miso pd3/mosi pd4/sck pd5/ ss v dd pa7/pai/oc1 pa6/oc2/oc1 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 26 pa4/oc4/oc1 pa3/oc5/ic4/oc1 pa2/ic1 pa1/ic2 pa0/ic3 pb7/addr15 pa5/oc3/oc1 xirq f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
engineering bulletin migrating to the mc68hc11f1 eb381 motorola 5 figure 2. pin assignments for mc68hc11f1 80-pin qfp difference: memory map (memory, registers, etc.) the mc68hc811e2 has the same memory mapped locations for the normal mode interrupt vectors. the ram, eeprom, external addressing, and registers for these devices are different. see figure 3 and figure 4 . 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 37 38 39 40 17 18 19 20 44 43 42 41 64 63 62 61 nc nc pb6/addr14 pb5/addr13 pb4/addr12 pb3/addr11 pb2/addr10 pb1/addr9 pb0/addr8 pf7/addr7 pf6/addr6 pf5/addr5 pf4/addr4 pf3/addr3 pf2/addr2 pf1/addr1 pf0/addr0 pe0/an0 pe4/an4 nc nc pg1 pg2 pg3 pg4/csio1 pg5/csi02 pg6/csgen pg7/ csprog irq xirq reset pc7/data7 pc6/data6 pc5/data5 pc4/data4 pc3/data3 pc2/data2 pc1/data1 nc nc nc nc pb7/addr15 pa0/ic3 pa1/ic2 pa3/oc5/ic4/oc1 pa4/oc4/oc1 pa5/oc3/oc1 pa6/oc2/oc1 pa7/pai/oc1 v dd pd5/ ss pd4/sck pd3/mosi pd2/miso pd1/txd pd0/rxd pg0 nc pa2/ic1 nc nc pe1/an1 pe5/an5 pe2/an2 pe6/an6 pe3/an3 pe7/an7 v rl v rh v ss modb/v stby moda/ lir e r/ w extal xtal nc 4xout pc0/data0 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
engineering bulletin eb381 6 motorola case 1 example: ram issue: none change required: none. however, you may want to take advantage of the extra 768 bytes of ram. this block of ram is also relocatable on 4-k boundaries in the 64-kbyte address space by writing an appropriate value into bits 4? in the init register. case 2 example: eprom issue: the mc68hc11f1 has less eeprom (512 bytes vs. 2048 bytes), and it is located at a different starting address ($fe00 vs. $f800). change required: change code to use new eeprom block located from $fe00 to $ffdf. case 3 example: external address range issue: external address range is different. change required: change the external address range from $1040?f7ff to $1060?fdff. case 4 example: register block issue: register block is a different size and some register addresses have different meanings. change required: the register block on the mc68hc11f1 is 96 bytes instead of 64-bytes and is located at a default location of $1000?105f. this block of ram is also re-locatable on 4-k boundaries in the 64-kbyte address space by writing to bits 0? in the init register. these register addresses also have different meanings: $1001, $1002, $1003, $1005, $1006, $1036, $1038, and $103e. $105c?105f are additional registers. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
engineering bulletin migrating to the mc68hc11f1 eb381 motorola 7 figure 3. memory map for mc68hc811e2 ffc0 ffff normal modes interrupt vectors 64-byte register block 256 bytes ram single chip bootstrap special test ext $0000 $1000 $f800 $ffff 0000 1000 103f bf00 expanded f800 ffff bfff bfc0 bfff special modes interrupt vectors 2048 bytes eeprom boot rom ext ext 00ff ext f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
engineering bulletin eb381 8 motorola figure 4. mc68hc11f1 memory map difference: eeprom block protect since these two parts differ significantly regarding eeprom size and location, the address range and block size that can be protected is different. see figure 5 , table 2 , and table 3 . case 1 example: eeprom block protect issue: eeprom block protect addresses and sizes are different. change required: the bprt bits in the bprot register ($1035) must be changed to protect the address ranges and block sizes the user desires. $0000 $1000 $fe00 $ffff external x000 x3ff bf00 external external ffc0 ffff single chip expanded bootstrap special test external notes: 1. ram can be remapped to any 4-byte boundary ($x000). ? represents the value contained in ram [3:0] in the init register. 2. the register block can be remapped to any 4-byte boundary ($y000). ? represents the value contained in reg[3:0] in the init register. 3. special test mode vectors are externally addressed. 4. in special test mode the address locations $zd00?zdff are not externally addressable. ? represents the value of bits ee[3:0] in the config register. 5. eeprom can be remapped to any 4-byte boundary ($z000). ? represents the value contained in ee[3:0] in the config register. normal mode interrupt vectors ext y000 yo5f zd00 zdff ze00 zfff bfc0 bfff 512 bytes eeprom (5) 256 bytes reserved (4) special test mode only special mode (3) interrupt vectors 1024 bytes ram (1) 96-byte register block (2) 256 bytes bootstrap rom f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
engineering bulletin migrating to the mc68hc11f1 eb381 motorola 9 address: $1035 bit 7 654321 bit 0 read: ptcon bprt3 bprt2 bprt1 bprt0 write: reset: 00011111 = unimplemented figure 5. block protect register (bprot) table 2. eeprom block protect in mc68hc811e2 mcus bit name block protected block size bprt0 $xb00?x9ff 512 bytes bprt1 $xa00?xbff 512 bytes bprt2 $xc00?xdff 512 bytes bprt3 $xe00?xfff 512 bytes table 3. eeprom block protection in mc68hc11f1 mcus bit name block protected block size bprt0 $xe00?xe1f 32 bytes bprt1 $xe20-$xe5f 64 bytes bprt2 $xe60?xedf 128 bytes bprt3 $xee0?xfff 288 bytes f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
engineering bulletin eb381 10 motorola difference: config register the operation of the config register on the mc68hc811e2 differs from the mc68hc11f1. see figure 6 , figure 7 , table 4 , and table 5 . case 1 example: config register issue: some of the bits in the config register have different meaning. change required: the bits in the config register ($103f) must be changed to meet the user? requirements. bit 3 (nosec) is not used and bits 4? (eeprom mapping) define different address ranges. address: $103f bit 7 654321 bit 0 read: ee3 ee2 ee1 ee0 nosec nocop eeon write: single-chip reset: 1 1 1 1 u u 1 1 bootstrap: 1 1 1 1 u u(l) 1 1 expanded: u u u u 1 u 1 u test: u u u u 1 u(l) 1 0 = unimplemented u indicates a previously programmed bit. u(l) indicates that the bit resets to the logic level held in the latch prior to reset, but the function of cop is controlled by the disr bit in test1 register. figure 6. mc68hc811e2 system configuration register (config) table 4. mc68hc811e2 eeprom mapping ee[3:0] eeprom location ee[3:0] eeprom location 0000 $0800?0fff 1000 $8800?8fff 0001 $1800?1fff 1001 $9800?9fff 0010 $2800?2fff 1010 $a800?afff 0011 $3800?3fff 1011 $b800?bfff 0100 $4800?4fff 1100 $c800?cfff 0101 $5800?5fff 1101 $d800?dfff 0110 $6800?6fff 1110 $e800?efff 0111 $7800?7fff 1111 $f800?ffff f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
engineering bulletin migrating to the mc68hc11f1 eb381 motorola 11 address: $103f bit 7 654321 bit 0 read: ee3 ee2 ee1 ee0 nocop eeon write: reset states: single chip expanded bootstrap special test 1 1 p p 1 1 p p 1 1 p p 1 1 p p 1 1 1 1 p p(l) p p(l) 1 1 1 1 1 1 p 0 = unimplemented p = previously programmed bit p(l) = p(l) indicates that the bit resets to the logic level held in the latch prior to reset, but the function of cop is controlled by disr bit in test1 register. figure 7. m68hc11f1 system configuration register (config) table 5. eeprom mapping ee[3:0] eeprom position ee[3:0] eeprom position 0 0 0 0 $0e00?0fff 1 0 0 0 $8e00?8fff 0 0 0 1 $1e00?1fff 1 0 0 1 $9e00?9fff 0 0 1 0 $2e00?2fff 1 0 1 0 $ae00?afff 0 0 1 1 $3e00?3fff 1 0 1 1 $be00?bfff 0 1 0 0 $4e00?4fff 1 1 0 0 $ce00?cfff 0 1 0 1 $5e00?5fff 1 1 0 1 $de00?dfff 0 1 1 0 $6e00?6fff 1 1 1 0 $ee00?efff 0 1 1 1 $7e00?7fff 1 1 1 1 $fe00?ffff f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
engineering bulletin eb381 12 motorola difference: external glue logic requirements case 1 example: external glue logic issue: some of the external glue logic requirements are different. change required: the mc68hc11f1 has a non-multiplexed address/data bus and four programmable chip selects. this will eliminate the need for such external devices as a demultiplexer, a decoder, and a latch. see figure 8 and figure 9 . figure 8. mc68hc811e2 multiplexed bus example r/w e high address 68hc811e9 we oe address/data as d q latch oe le data address eprom data address ram decode ce oe ce we oe f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
engineering bulletin migrating to the mc68hc11f1 eb381 motorola 13 figure 9. mc68hc11f1 non-multiplexed bus example memory map example this example is for connecting an 8- or 16-kbyte external ram and a 32-kbyte external eprom. see figure 10 . leave internal ram at default location ($0000?03ff). leave register block at default location ($1000?105f). relocate internal eeprom to address $2e00?2fff. this is done by programming the ee0?e3 bits in the config register ($103f) to %0010. you may also need to program the eeon bit to ensure that the eeprom is present in the memory map (see figure 7 ). csprog comes up enabled in expanded mode. you will need to program the psiza and psizb bits in the csctl register ($105d) to set an address range. in this example, psiza = 0 and psizb = 1 ($8000?ffff). the user may also want to clear the pstha and psthb bits in the csstrh register ($105c) to ensure no clock stretch is used. another option with csprog is the priority regarding csgen. this can be programmed using the gcspr bit in the csctl register. r/w e address 68hc11f1 we oe data oe we oe csgen data data eprom address ram address ce ce csgprog f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
engineering bulletin eb381 14 motorola for the csgen chip select, the g1sza?1szc bits in the csgsiz register ($105f) must be programmed to %011 for an 8- kbyte ram or to %010 for a 16-kbyte ram. next, the starting address for this address must be programmed. this is done by programming bits ga13 and ga15 for the 8-kbyte ram or bits ga14 and ga15 for the 16-kbyte ram. like the csprog, clear the gstha and gsthb bits to disable the clock stretch. the user should also set the gnpol bit (bit 4) in the csgsiz register to a 0 to make sure chip select csgen is an active low. normally, the chip select for an external ram device is made active with respect to the e clock going high. in this example, the csgen chip select needs to be made active during the address valid time. this is done by setting the gavld bit (bit 3) in the csgsiz register to a 1. the user should also check the other options available in the csgsiz register. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
engineering bulletin summary eb381 motorola 15 figure 10. mc68hc11f1 expanded mode memory map example summary for those users using the mc68hc811e2 with external memory systems, the mc68hc11f1 is one possible migration path. customers may also want to look at migrating to the mc68hc711e9 (see migrating from the mc68hc811e2 to the mc68hc711e9 , motorola document order number eb380/d), or to the mc68hc812a4. 1024 bytes of internal ram leave internal ram in default location not used 96-byte register block leave register block in default location not used 512 bytes of internal eeprom relocate eeprom to this address not used 8 or 16 kbytes of external ram use csgen chip select not used when 8-kbyte ram is used 32 kbytes of external eprom use cspr og chip select $0000 $03ff $1000 $105f $2e00 $2fff $4000 $5fff or $7fff $8000 $ffff f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
non-disclosure agreement required engineering bulletin eb381/d motorola, inc., 2001 motorola reserves the right to make changes without further notice to any products herein. motorola makes no warranty, representation or guarantee r egarding the suitability of its products for any particular purpose, nor does motorola assume any liability arising out of the application or use of any product or circuit, and speci cally disclaims any and all liability, including without limitation consequential or incidental damages. "typical" parameters which may be provided in motorola data sheets and/or speci ?ations can and do vary in different applications and actual performance may vary over time. all operating parameters, including "typicals" must be validated for each customer applica tion by customer's technical experts. motorola does not convey any license under its patent rights nor the rights of others. motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failu re of the motorola product could create a situation where personal injury or death may occur. should buyer purchase or use motorola products for any such unintended or unauthorized applicati on, buyer shall indemnify and hold motorola and its of?ers, employees, subsidiaries, af?iates, and distributors harmless against all claims, costs, damages, and expenses, and rea sonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that mot orola was negligent regarding the design or manufacture of the part. motorola and are registered trademarks of motorola, inc. motorola, inc. is an equal opportuni ty/af?mative action employer. how to reach us: usa/europe/locations not listed: motorola literature distribution; p.o. box 5405, denver, colorado 80217. 1-303-675-2140 or 1-800-441-2447 japan: motorola japan ltd.; sps, technical information center, 3-20-1, minami-azabu, minato-ku, tokyo 106-8573 japan. 81-3-3440-3569 asia/pacific: motorola semiconductors h.k. ltd.; silicon harbour centre, 2 dai king street, tai po industrial estate, tai po, n.t., hong kong . 852-26668334 technical information center: 1-800-521-6274 home page: http://www.motorola.com/semiconductors/ f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .

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